troniction
Book

Lab

How close is close enough?

The two ends of a serial link never agree exactly. There is no shared clock — the receiver sees one falling edge and counts bit-times from it. So the question is not whether the rates differ, but by how much before it breaks.

Drag the slider. Watch where the failure appears: always at the right-hand end, never the left.

CLOCK ERROR BETWEEN THE TWO ENDS
2.0%
inside the ±2% engineering convention
0%2% — convention5% — ceiling10%
WHERE THE RECEIVER ACTUALLY SAMPLES
Sd0d1d2d3d4d5d6d7Tticks = sample instants · boxes = where the bit actually is
Every sample still lands inside its own bit. Worst drift 0.19 of a bit-time — the frame survives.
Drift grows with every bit-time counted from the falling edge, so the far end of the frame always breaks first — the stop bit is where failure appears, which is why a mismatched link reports a frame error rather than quietly corrupting one bit. Push the error further and the failure walks leftward into the data bits. It never starts there.

What this shows

The two ends of a serial link never agree exactly, and they do not need to. The receiver samples near the middle of each bit, so it has about half a bit-time of slack before a sample lands in the wrong bit.

Timing error accumulates across the frame. The receiver synchronises once, on the falling edge of the start bit, then counts on its own. So a 1% error is 0.5% off at the first bit and 9.5% off at the tenth.

For a standard 8N1 frame the last slot sits 9.5 bit-times from the sync edge, which gives a hard ceiling of 0.5 / 9.5 = 5.26% total error between the two ends. NXP application note AN10333 quotes approximately 5% for the same frame.

Failure always appears at the far end of the frame first, and the far end is the stop bit. Because the receiver knows the stop bit must be high, a mismatch raises a frame error rather than silently corrupting a data bit. Push the error higher and the failure spreads leftward into the data bits, but it never begins there.

The widely quoted 2% figure is an engineering convention, not a specification. 5.26% is where it breaks; 2% is where you design, because both ends contribute error and parts drift with temperature.

The full derivation, and why an Arduino is never exactly on the number →

Common questions

What is the maximum baud rate error for UART?
For a standard 8N1 frame the arithmetic gives 5.26% total between the two ends before the last bit is sampled outside its own bit time. NXP AN10333 quotes approximately 5%. In practice engineers design to 2% or better to leave margin for temperature drift.
Why is 2% quoted as the baud rate tolerance?
Because 5.26% is the point of total failure, not the point of safe operation. It assumes a perfect edge, no noise and no drift, and it is the combined error of both ends. The 2% convention keeps a real link inside the cliff rather than balanced on its edge.
Which bit fails first when baud rates do not match?
The stop bit. Error accumulates from the start bit onward, so the slot furthest from the synchronising edge is sampled wrongly first — and in an 8N1 frame that is the stop bit. This is why a mismatch reports a frame error instead of a corrupted byte.